1. Field of the Invention
The present invention relates to computer systems, and, in particular, to circuitry for writing data to and reading data from memory devices in computer systems.
2. Description of the Related Art
In a conventional computer system, a host controller provides clock, address, and other control signals for writing data to and reading data from a memory device, such as a random access memory (RAM). Depending on the particular application, there may be relatively stringent requirements related to the timing at which these different signals are applied in parallel to the memory device. For example, system requirements may limit the difference between the earliest and latest arrival times (also referred to as the skew) of these signals to a specified maximum skew value. In addition, there may be a requirement limiting the overall signal propagation delay from the controller to the memory device to a specified maximum delay value.
In the past, a conventional computer system having two or more different memory devices would typically have separate signal buffering and retiming circuitry dedicated to meeting the skew and/or delay requirements for each different memory device.